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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects in Chattanooga, TN

By Barnes & Noble

Current price: $139.00
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Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects

Barnes and Noble

Automatic Analog IC Sizing and Optimization Constrained with PVT Corners and Layout Effects in Chattanooga, TN

By Barnes & Noble

Current price: $139.00
Loading Inventory...

Size: EBook

This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.
This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

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Barnes & Noble is the world’s largest retail bookseller and a leading retailer of content, digital media and educational products. Our Nook Digital business offers a lineup of NOOK® tablets and e-Readers and an expansive collection of digital reading content through the NOOK Store®. Barnes & Noble’s mission is to operate the best omni-channel specialty retail business in America, helping both our customers and booksellers reach their aspirations, while being a credit to the communities we serve.

2100 Hamilton Pl Blvd, Chattanooga, TN 37421, United States

Find Barnes and Noble at Hamilton Place in Chattanooga, TN

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